Tutorial: Create a circuit
NOTE: Before starting this tutorial, you should have installed and set up JITX.
You can follow along with this tutorial in the video above. Below is a transcript to make the code and text easier to read.
1. Searching for components
Open the JITX sidebar and click on Find Components. Search for:
TPS62080DSGR
Then click on the "Create Component" button. This adds a local code model of a component to your project.
To add it to your design, in main.stanza, change the my-design
module to be:
pcb-module my-design:
inst buck : components/Texas-Instruments/TPS62080DSGR/component
You have added this component to your design, run it to see it appear in the schematic and layout.
2. JITX component models
Open the components/Texas-Instruments/TPS62080DSGR.stanza
file.
Delete the original pcb-symbol
definition. In the pcb-component
definition, shuffle the order of the pins, and replace the assign-symbol()
line so that the new component body becomes:
pin-properties :
[pin:Ref | pads:Ref ... | side:Dir | electrical-type:String | bank:Int]
[VIN | p[8] | Left | "power_in" | 0]
[EN | p[1] | Left | "unspecified" | 0]
[MODE | p[3] | Left | "unspecified" | 0]
[GND | p[2] p[9] | Left | "power_in" | 0]
[PG | p[6] | Right | "unspecified" | 0]
[SW | p[7] | Right | "power_in" | 0]
[VOS | p[5] | Right | "unspecified" | 0]
[FB | p[4] | Right | "unspecified" | 0]
assign-landpattern(lp)
make-box-symbol()
3. Reusable circuits
Below the component definition in TPS62080DSGR.stanza
, add:
public pcb-module module :
inst reg : components/Texas-Instruments/TPS62080DSGR/component
4. Using models from the database
Open the JITX sidebar and click on Find Components. Search for:
NR3015T1R0N
Then click on the "Copy Component" button, and paste it into the module:
public pcb-module module (-- output-voltage:Double = 3.3) :
inst buck : components/Texas-Instruments/TPS62080DSGR/component
inst L : database-part(["mpn" => "NR3015T1R0N", "manufacturer" => "Taiyo Yuden"])
To use the database-part
function, you'll have to import generic-components
at the top:
defpackage components/Texas-Instruments/TPS62080DSGR :
import core
import jitx
import jitx/commands
import ocdb/utils/box-symbol
import ocdb/utils/generic-components
Change main.stanza
to use the new module:
pcb-module my-design:
inst buck : components/Texas-Instruments/TPS62080DSGR/module
5. Making connections with net
In the module definition in TPS62080DSGR.stanza
, add ports and nets to build the circuit and expose an interface:
public pcb-module module (-- output-voltage:Double = 3.3) :
port vin
port vout
port en
port gnd
inst buck : components/Texas-Instruments/TPS62080DSGR/component
inst L : database-part(["mpn" => "NR3015T1R0N", "manufacturer" => "Taiyo Yuden"])
net (buck.SW L.p[1])
net (buck.VOS L.p[2] vout)
net (buck.VIN vin)
net (buck.EN en)
net (buck.GND gnd buck.MODE)
In main.stanza
you can now net the module pins:
pcb-module my-design:
inst buck : components/Texas-Instruments/TPS62080DSGR/module
net (buck.vin buck.en)
6. Parametric components
In the module definition in TPS62080DSGR.stanza
, add the input and output capacitors:
bypass-cap-strap(buck.VIN, buck.GND, 10.0e-6)
bypass-cap-strap(L.p[2], buck.GND, 22.0e-6)
7. Reusing a smart sub-circuit
In the module definition in TPS62080DSGR.stanza
, add the voltage divider and attach it:
inst feedback : ocdb/modules/passive-circuits/voltage-divider(
source-voltage = typ(3.3),
divider-output = 0.45 +/- (3 %),
current = 100.0 * 100.0e-9)
net (feedback.in L.p[2])
net (feedback.out buck.FB)
net (feedback.lo buck.GND)
8. Making the parametric power regulator
Finally, change the module definition in TPS62080DSGR.stanza
to accept an output-voltage
argument, and pass that in to the voltage divider. Here is the completed module:
public pcb-module module (-- output-voltage:Double = 3.3) :
port vin
port vout
port en
port gnd
inst buck : components/Texas-Instruments/TPS62080DSGR/component
inst L : database-part(["mpn" => "NR3015T1R0N", "manufacturer" => "Taiyo Yuden"])
net (buck.SW L.p[1])
net (buck.VOS L.p[2] vout)
net (buck.VIN vin)
net (buck.EN en)
net (buck.GND gnd buck.MODE)
bypass-cap-strap(buck.VIN, buck.GND, 10.0e-6)
bypass-cap-strap(L.p[2], buck.GND, 22.0e-6)
inst feedback : ocdb/modules/passive-circuits/voltage-divider(
source-voltage = typ(output-voltage),
divider-output = 0.45 +/- (3 %),
current = 100.0 * 100.0e-9)
net (feedback.in L.p[2])
net (feedback.out buck.FB)
net (feedback.lo buck.GND)
Change main.stanza
you can now net the module pins:
pcb-module my-design:
inst buck : components/Texas-Instruments/TPS62080DSGR/module(output-voltage = 3.3)
net (buck.vin buck.en)