; Generated by JITX 2.20.0
#use-added-syntax(jitx)
defpackage main :
import core
import jitx
import jitx/commands
; Define the shape/size of the board
val board-shape = RoundedRectangle(30.0, 18.5, 0.25)
public defstruct OpAmpBank :
in+:JITXObject
in-:JITXObject
out:JITXObject
public defn make-multi-opamp-symbol (banks:Seqable<OpAmpBank>, VCC:Pin, VEE:Pin) :
inside pcb-component:
symbol :
val psym = ocdb/utils/symbols/power-supply-sym
unit(0) = psym(VCC => psym.vs+, VEE => psym.vs-)
for (bank in banks, i in 1 to false) do :
val sym = ocdb/utils/symbols/multi-op-amp-sym
unit(i) = sym(
in+(bank) => sym.vi+,
in-(bank) => sym.vi-,
out(bank) => sym.vo
)
pcb-component DualOpAmp :
pin VCC
pin VEE
pin in1+
pin in1-
pin out1
pin in2+
pin in2-
pin out2
val banks = [
OpAmpBank(in1+, in1-, out1),
OpAmpBank(in2+, in2-, out2)
]
make-multi-opamp-symbol(banks, VCC, VEE)
val soic = ocdb/utils/landpatterns/soic127p-landpattern(8)
landpattern = soic(
VCC => soic.p[8], VEE => soic.p[4],
out1 => soic.p[1], in1- => soic.p[2], in1+ => soic.p[3],
out2 => soic.p[7], in2- => soic.p[6], in2+ => soic.p[5],
)
; Module to run as a design
pcb-module my-design :
; define some pins/ports
pin gnd
pin power-5v
pin signal
inst opa : DualOpAmp
defn setup-design (name:String, board:Board
--
rules:Rules = ocdb/utils/defaults/default-rules
vendors:Tuple<String|AuthorizedVendor> = ocdb/utils/design-vars/APPROVED-DISTRIBUTOR-LIST
quantity:Int = ocdb/utils/design-vars/DESIGN-QUANTITY) :
set-current-design(name)
set-board(board)
set-rules(rules)
set-bom-vendors(vendors)
set-bom-design-quantity(quantity)
; Set the design name - a directory with this name will be generated under the "designs" directory
; the board - a Board object
; [optional] rules - the PCB design rules (if not givn default rules will be used)
; [optional] vendors - Strings or AuthorizedVendors (if not give default vendors will be used)
; [optional] quantity - Minimum stock quantity the vendor should carry (if not give default quantity will be used)
setup-design(
"jitx-design",
ocdb/utils/defaults/default-board(ocdb/manufacturers/stackups/jlcpcb-jlc2313, board-shape)
)
; Set the schematic sheet size
set-paper(ANSI-A)
; Set the top level module (the module to be compile into a schematic and PCB)
set-main-module(my-design)
; View the results
view-board()
view-schematic()
view-design-explorer()