JITX Documentation

#use-added-syntax(jitx)
defpackage main :
  import core
  import math
  import jitx
  import jitx/commands
  import ocdb/utils/generic-components

; Define the shape/size of the board
val board-shape = RoundedRectangle(30.0, 18.5, 0.25)

doc: \<DOC>
RC Low Pass Filter

This is a very crude implementation. This is really
only intended to demonstrate the concept of modules
with multiple components being used as a channel
in pin assignment.

@param freq Corner Frequency for the RC Filter. Must be greater than zero.
@param R-val Resistance value to use by default in the RC filter.
<DOC>
pcb-module low-pass (freq:Double, R-val:Double = 10.0e3) :

  port vin : pin
  port vout : pin
  port gnd : pin

  val C-val =   1.0 / ( 2.0 * PI * R-val * freq)
  val C-val* = closest-std-val(C-val, 10.0)

  inst R : chip-resistor(R-val)
  inst C : ceramic-cap(C-val*)

  net (vin, R.p[1])
  net (R.p[2], C.p[1], vout)
  net (C.p[2], gnd)

doc: \<DOC>
Pass Through Connection Bundle
<DOC>
pcb-bundle pass-through:
  port A : pin
  port B : pin

doc: \<DOC>
Multi-Channel RC Low Pass Filter

@param ch Number of channels to construct
@param freq Cut-off frequency of the filters in Hz. Must be greater than zero.
<DOC>
pcb-module multi-lpf (ch:Int, freq:Double) :
  port gnd : pin

  inst lpfs : low-pass(freq)[ch]

  for i in 0 to ch do:
    net (gnd, lpfs[i].gnd)

  for i in 0 to ch do:
    supports pass-through:
      pass-through.A => lpfs[i].vin
      pass-through.B => lpfs[i].vout


; Module to run as a design
pcb-module my-design :

  net GND

  inst J1 : ocdb/components/amphenol/minitek127/component(6)
  inst J2 : ocdb/components/amphenol/minitek127/component(6)

  net (GND, J1.p[6], J2.p[6])

  val chs = 4
  inst filters : multi-lpf(chs, 100.0e3)
  net (GND, filters.gnd)

  require pts:pass-through[chs] from filters
  for i in 0 to chs do:
    net (J1.p[i + 1], pts[i].A)
    net (J2.p[i + 1], pts[i].B)


  geom(GND):
    copper-pour(LayerIndex(0, Bottom), isolate = 0.2) = board-shape


public defn setup-design (name:String, board:Board
                          --
                          rules:Rules = ocdb/utils/defaults/default-rules
                          vendors:Tuple<String|AuthorizedVendor> = ocdb/utils/design-vars/APPROVED-DISTRIBUTOR-LIST
                          quantity:Int = ocdb/utils/design-vars/DESIGN-QUANTITY
                          bom-columns:Tuple<BOMColumn> = ocdb/utils/design-vars/BOM-COLUMNS) :
  set-current-design(name)
  set-board(board)
  set-rules(rules)
  set-bom-vendors(vendors)
  set-bom-design-quantity(quantity)
  set-bom-columns(bom-columns)
  set-paper(ANSI-A4)
  set-export-backend(`altium) ; set the CAD software for export to be altium (also supported: `kicad)


setup-design(
  "jitx-design",
  ocdb/utils/defaults/default-board(ocdb/manufacturers/stackups/jlcpcb-jlc2313, board-shape)
)

; Set the schematic sheet size
set-paper(ANSI-A)

; Set the top level module (the module to be compile into a schematic and PCB)
set-main-module(my-design)

; Use any helper function from helpers.stanza here
; run-check-on-design(my-design)

; View the results
view-board()
view-schematic()
view-design-explorer()
view-bom(BOM-STD)