To use these functions, import the package jitx/commands and the package jitx where the enums are defined.
import jitx
import jitx/commmands
defn set-main-module (module:Instantiable)
Define the "main" module of the current design.
Syntax
pcb-module main-module :
...
set-main-module(main-module)
Description
The main module is the root of the entire JITX design, and is analogous to a "root" schematic sheet.
defn set-board (board:Board)
Sets the pcb-board object used by the current design.
Syntax
pcb-board my-board :
...
set-board(my-board)
Description
This specifies the pcb-board which defines the stackup,
board outline, and signal boundary of the physical board
used in the design.
Multi-board designs require separate calls to set-current-design,
set-board, etc.
defn set-rules (rules:Rules)
Set the design rules for the current design.
Syntax
pcb-rules jlc-pcb-rules :
...
set-rules(jlc-pcb-rules)
Description
The design rules takes the name of a pcb-rules as an
argument and configures the design rules used for generators
and checks in the current design. This will be cleared on
calls to set-current-design.
defn set-default-rules (rules:Rules)
Sets the default rules for all designs in the current program.
Syntax
pcb-rules jlc-pcb-rules :
...
set-default-rules(jlc-pcb-rules)
Description
Default rules differ from design rules set in set-rules in that
they are not cleared between designs, and serves as temporary or
default values for design rules so generators can make progress
even if you have not set the rules for your design.
Default rules can also be used to share design rules in multi-design programs.
defn clear-default-rules ()
Syntax
clear-default-rules()
Description
Removes default rules if they are set. This is primarily used for testing.