JITX Documentation

; When renaming the stanza package name below, also rename it in the folder stanza.proj
; See docs.jitx.com for help
#use-added-syntax(jitx)
defpackage components/AP2205:
  import core
  import collections
  import jitx
  import jitx/commands
  import ocdb/utils/defaults
  import ocdb/utils/landpatterns
  import ocdb/utils/box-symbol
  import ocdb/utils/bundles
  import ocdb/utils/generic-components
  import ocdb/utils/property-structs ; <--- helpers for checks

pcb-landpattern lp-AP2205 :
  make-dual-row-smd-landpattern(
    primary-num-pins, secondary-num-pins, 
    primary-pin-pitch, secondary-pin-pitch, 
    lead-span, package-length, package-width, 
    terminal-length, terminal-width) where :
    val primary-num-pins    = 3
    val secondary-num-pins  = 2
    val primary-pin-pitch   = 0.95
    val secondary-pin-pitch = 2.0 * primary-pin-pitch

    val lead-span           = min-typ-max(2.70, 2.80, 3.00) 
    val package-length      = min-typ-max(2.90, 3.00, 3.10)
    val package-width       = min-typ-max(1.50, 1.60, 1.70)
    val terminal-length     = min-typ-max(0.35, 0.40, 0.55)
    val terminal-width      = min-typ-max(0.35, 0.38, 0.50)

public pcb-component component :
  name = "AP2205"
  description = "Adjustable LDO Regulator"
  mpn = "AP2205-W5-7"
  manufacturer = "Diodes Incorporated"
  reference-prefix = "U"

  ; Compute the power and generic pin properties
  val recommended-voltage = min-max(2.3, 24.0)
  val maximum-voltage     = typ(36.0)
  val esd-voltage         = 1000.0

  val power-props = PowerPin(recommended-voltage)
  val gen-props   = GenericPin(maximum-voltage, esd-voltage)
  val max-output-current = 250.0e-3

  pin-properties :
    [pin:Ref      | pads:Int ... | side:Dir ]
    [vin          | 1            | Left     ]
    [gnd          | 2            | Down     ]
    [enable       | 3            | Left     ]
    [adj          | 4            | Down     ]
    [vout         | 5            | Right    ]
    
  make-box-symbol()
  assign-landpattern(lp-AP2205)

  property(self.vin.generic-pin) = gen-props
  property(self.enable.generic-pin) = gen-props
  property(self.vin.generic-pin) = gen-props
  property(self.vin.power-pin) = ocdb/utils/property-structs/PowerPin(recommended-voltage)
  property(self.adj.vref) = min-typ-max(1.215, 1.24, 1.265)
  property(self.vout.max-current) = 250.0e-3

public pcb-module module (vout:Double) :

  port in  : power
  port out : power 
  port enable 
  
  ; Instantiate the component
  inst ldo : components/AP2205/component
  
  ; Wire up the LDO to the module ports
  net VIN  (ldo.vin,  in.vdd)
  net VOUT (ldo.vout, out.vdd)
  net GND  (ldo.gnd, in.gnd, out.gnd)
  net (ldo.enable, enable)

  cap-strap(ldo.vin, ldo.gnd, 1.0e-6)
  cap-strap(ldo.vout, ldo.gnd, 2.2e-6)

  inst output-voltage-divider : ocdb/modules/passive-circuits/voltage-divider(source-voltage = high-voltage, divider-output = adj-voltage, tolerance = tolerance, current = current) where :
    val high-voltage = vout
    val adj-voltage = typ(property(ldo.adj.vref))
    val tolerance = 1.0
    val current = 0.5e-3

  net (output-voltage-divider.in, ldo.vout) 
  net (output-voltage-divider.out, ldo.adj) 
  net (output-voltage-divider.lo, ldo.gnd)

  symbol(GND) = ocdb/utils/symbols/ground-sym

  ; Assign the property to the LDO's output pin. We lookup the 
  ; maximum current using the `property(...)` introspection.
  property(ldo.vout.power-supply-pin) = 
    ocdb/utils/property-structs/PowerSupplyPin(typ(vout), property(ldo.vout.max-current) as Double)