Symbol

symbol is an ESIR statement that associates a schematic symbol with a component, and maps the ports of the component to the pins on the symbol.

Syntax

pcb-component inverted-f-antenna-cmp :
  description = "2.4 GHz Inverted F trace antenna"
  pin launch
  pin gnd
  symbol = antenna-symbol(1,1)(launch => antenna-symbol(1,1).p[1], gnd => antenna-symbol(1,1).p[2])

pcb-component amphenol-minitek127 (n-pins:Int) :
  description = "SMD Female 1.27mm pitch header"
  port p : pin[[1 through n-pins]]
  symbol  = header-symbol(n-pins,2)(for i in 1 through n-pins do: p[i] => header-symbol(n-pins,2).p[i])

Description

The symbol statement specifies a symbol to use, as well as a pin mapping. The general pattern is:

pcb-component my-component:
  pin component-pin-a
  pin component-pin-b
  symbol = my-symbol(component-pin-a => my-symbol.pin-a, component-pin-b => my-symbol.pin-b)

Where my-symbol is the name of the pcb-symbol, which has pins pin-a and pin-b.

The following snippet matches component ports launch and gnd to the pins of the parametric antenna-symbol p[1] and p[2].

pcb-component inverted-f-antenna-cmp :
  description = "2.4 GHz Inverted F trace antenna"
  pin launch
  pin gnd
  symbol = antenna-symbol(1,1)(launch => antenna-symbol(1,1).p[1], gnd => antenna-symbol(1,1).p[2])

Note that when you instantiate this component in a design, you can only net to the ports of the component, not the pins of the symbol. e.g.:

inst ant : inverted-f-antenna-cmp
net (ant.gnd) ; Allowed
net (ant.p[2]) ; NOT Allowed, and will cause a compile error.

To save some typing, you can use for loops in the symbol pin-mapping. The following snippet matches (p[1] => p[1], p[2] => p[2], ... p[n-pins] => p[n-pins]) for a parametric header symbol that has the same pin names as the component.

pcb-component amphenol-minitek127 (n-pins:Int) :
  description = "SMD Female 1.27mm pitch header"
  port p : pin[[1 through n-pins]]
  symbol = my-symbol(component-pin-a => my-symbol.pin-a, component-pin-b => my-symbol.pin-b)

Multi-part Symbols

It is often useful to create symbols that have multiple constituent parts. For example, a dual operational amplifier like the LM358LV contains two independent operational amplifiers. JITX provides multi-part symbol support via the unit statement.

Unit Statement Example

Complete design example for multi-part symbols

public defstruct OpAmpBank :
  in+:JITXObject
  in-:JITXObject
  out:JITXObject

public defn make-multi-opamp-symbol (banks:Seqable<OpAmpBank>, VCC:Pin, VEE:Pin) :
  inside pcb-component:
    symbol :
      val psym = ocdb/utils/symbols/power-supply-sym
      unit(0) = psym(VCC => psym.vs+, VEE => psym.vs-)
      for (bank in banks, i in 1 to false) do :
        val sym = ocdb/utils/symbols/multi-op-amp-sym
        unit(i) = sym(
          in+(bank) => sym.vi+,
          in-(bank) => sym.vi-,
          out(bank) => sym.vo
        )

Notice that the unit statement takes a single Int argument as the index into the multi-part symbol array. You can then assign any symbol with the = assignment operator.

; Example use `make-multi-opamp-symbol`
;
pcb-component DualOpAmp:
  pin VCC
  pin VEE

  pin in1+
  pin in1-
  pin out1

  pin in2+
  pin in2-
  pin out2

  ...
  val banks = [
    OpAmpBank(in1+, in1-, out1),
    OpAmpBank(in2+, in2-, out2)
  ]
  make-multi-opamp-symbol(banks, VCC, VEE)

When invoked, this results in a component with 3 parts: a sub-part symbol for the power rails and 2 sub-parts for the op-amp symbols.