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Reference
Reference
Stanza Quick Reference
Parts Query API
JITX Statements
JITX Statements
JITX Statements
JITX Types Reference
board
board
Boards
Description
Layer
Name
bundles
bundles
Bundle Statements
Description
Name
Ports
checks
checks
Check Statements
#CHECK
components
components
Components
Datasheet
Description
EModel
Evalwhen
Land Pattern
Manufacturer
MPN
Name
No connect
Pin Model
Pin Properties
Ports
Properties
Reference Prefix
Require
Spice
Supports
Symbol
Multipart symbols
design
design
Designs
description
name
pcb-enum
pcb-enum
Enum Statements
Description
Name
geoms
geoms
Geometry Statements
Circle
Copper Pour
Copper
Line
Loc
Point
Polygon
Rectangle
Shape
Text
Union
Via
landpatterns
landpatterns
Land Patterns
Copper
Description
Landpattern with Arguments
External Names
Geom
Layer
model3d
Name
Pad
Via
materials
materials
Materials
Description
Name
modules
modules
Module Level Statements
Connect
Description
Evalwhen
Geom
Insertion Loss Constraint
Instance
Instance Status
Layer
Layout Group
Place - how to place a instance or module in JITX
Make-Net
Name
Net
No connect
Node
Pin properties
Ports
Properties
ref-label
Reference designator
Require
Restrict
Schematic Group
Short Trace
structure
Supports
Symbol
timing-difference
timing
topology-segment
value-label
variant
pads
pads
Pads
Description
Layer
Name
routing structures
routing structures
Routing Structures
pcb-differential-routing-structure
NeckDown
pcb-routing-structure
rules
rules
Rules
Description
Name
stackups
stackups
pcb-stackup
layer
Stackup Layers
pcb-struct
pcb-struct
Struct Statements
Description
Name
symbols
symbols
Schematic Symbol Statements
backend-substitution
Description
Symbol Layers
Name
pin for Symbols
preferred-orientation
vias
vias
pcb-via
Backdrill Type
User Interface
User Interface
User Interface
Board
Board
Board View
Auto Pair Insertion
Auto-Via
Autoroute
Delete
Edit Bar
Route Mode
Selecting Board Elements
Transforms
Schematic
Schematic
Schematic View
Group Change Page
Group Merge
Group Replication
Group Split
Hierarchical Diagram
Net Merge
Net Split
Organize Ports
Schematic Groups
Selecting Schematic Elements
Transforms
UI Commands
UI Commands
UI Commands
General UI Commands
Board UI Commands
Schematic UI Commands
Default UI Keybinds
General
General
bind
cli
find
fit-selection
new-window
open
pan
select
store / recall
toggle
undo / redo
zoom
Board
Board
adjust
align
auto-pair-insertion
auto-via
componentcard
delete
distribute
fit-board-to-view
flip
invert
layer
mode
place-labels
remove-control
remove-via
rotate
route
select-ends
select-expand
select-nets
solo-active-layer
unroute
via
Schematic
Schematic
add-page
componentcard
delete-as-appropriate
delete
edit-sheet-title
flip-x / flip-y
group-merge
group-split
hierarchical-diagram
merge
mouse-coordinates
move-group
net-merge
net-split
organize-ports
page
pages
replicate
rotate
select-net
select-wire
set-replication-source
split
API Reference
API Reference
jitx
jitx/
jitx/
anchor
layer-specs
percentage
pose
preconditions
ref
stateful
toleranced
transform
grid-locs
emodel-types
emodels
signal-models
shapes
commands
interval
parts/
parts/
component-types
component-code
jsl/
jsl/
utils
via-structures
ensure
errors
layerstack
math
bundles
bundles/
bundles/
comms
debug
gates
general
circuits
circuits/
circuits/
Bypass
ConfigStrap
CrystalResonator
Network
Pullups
utils
design/
design/
Classable
E-Series
introspection
settings
solvers
geometry/
geometry/
LineRectangle
NotchedShapes
basics
box
landpatterns
landpatterns/
landpatterns/
BGA
BGA/
BGA/
package
pads
planner
IPC
QFN
QFP
SOIC
SON
SOP
SOT
VirtualLP
courtyard
dual-row
framework
generators
grid-planner
headers
helpers
introspection
keep-outs
leads
leads/
leads/
lead-fillets-table
lead-profile
lead-types
protrusions
through-hole
numbering
package-body
packages
pad-grid
pad-island
pad-planner
pads
quad
silkscreen
thermal-pads
thermal-vias
two-pin/
two-pin/
SMT-table
SMT
axial
generators
molded
radial
utils
pin-assignment
pin-assignment/
pin-assignment/
checks
circuit-pool
generators
protocols
protocols/
protocols/
displayport
ethernet
ethernet/
ethernet/
MDI/
MDI/
MDI-1000Base-T
MDI-100Base-TX
e10GBASE-KR
MII/
MII/
GMII
MII
MIIM
RGMII
RMII
utils
memory/
memory/
lpddr4
pcie
sata
usb
si
si/
si/
Microstrip
TransmissionLine
bus
constraints
couplers
helpers
pairs
physics
signal-ends
symbols
symbols/
symbols/
DIAC
SCR
SymbolDefn
SymbolNode
SymbolParams
TRIAC
ThreePinSymbol
TwoPinSymbol
arrows
audio
box-symbol
box-symbol/
box-symbol/
errors
utils
capacitors
comparator
crystal
decorators
diode-bridge
diodes
ferrite
framework
generators
hysteresis
inductors
instrumentation-amp
logic/
logic/
AND
OR
buffer
generators
net-symbols
net-symbols/
net-symbols/
bar-ground
bar-power
framework
ground-symbol
power-symbol
symbol-builder
op-amps
pin-refs
potentiometer
resistors
switches
transformer
transistors/
transistors/
BJT
FET
JFET
generators
utils
examples/
examples/
protocols/
protocols/
displayport/
displayport/
displayport-src
common/
common/
example-board
sata/
sata/
SATA-src
ethernet/
ethernet/
10GBASE-KR/
10GBASE-KR/
e10GBASE-KR-src
landpatterns/
landpatterns/
app-specific-keepout
pin-assignment/
pin-assignment/
swizzle
Examples
Designs
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