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jsl/protocols/memory/lpddr4

Package name: jsl/protocols/memory/lpddr4

LPDDR4

LPDDR4 is a point-to-point high speed memory protocol

References

  • https://en.wikipedia.org/wiki/LPDDR

This file contains functions and definitions for supporting LPDDR4 connections between microprocessors and memories in a board design.

Summary

Data Types

LPDDR4-Rank

LPDDR4 Rank enums This is a fixed list of possible ranks for LPDDR4

Functions

Function Description
connect-LPDDR4 Connect and constrain a LPDDR4 link
LPDDR4-Constraint
lpddr4
lpddr4-x16
rank-to-int

LPDDR4-Constraint

LPDDR4 SI Constraint Type

Constructors

Function Description
LPDDR4-Constraint (+ 1) Constructor for defstruct LPDDR4-Constraint

Methods

Function Description
constrain Add constraints to a LPDDR4 link

Functions

Function Description
LPDDR4-Constraint

LPDDR4-Width

LPDDR4 Width enums This is a fixed list of possible channel widths for LPDDR4

Functions

Function Description
num-x16-lanes
connect-LPDDR4 Connect and constrain a LPDDR4 link
width-to-int
LPDDR4-Constraint
lpddr4

General Definitions

Function Description
lpddr4-lane

Definitions

LPDDR4-Rank

LPDDR4 Rank enums This is a fixed list of possible ranks for LPDDR4

public defenum LPDDR4-Rank <: Equalable & Hashable & JITXValue

  • LPDDR4-Rank1

  • LPDDR4-Rank2

  • LPDDR4-Rank3

Functions

connect-LPDDR4

Connect and constrain a LPDDR4 link

public defn connect-LPDDR4 (src:JITXObject, dst:JITXObject, width:LPDDR4-Width, rank:LPDDR4-Rank, diff-rs:DifferentialRoutingStructure, rs:RoutingStructure)

  • src: JITXObject - Source End Point - must be of lpddr4 type with width 'width' and rank 'rank'
  • dst: JITXObject - Destination End Point - must be of lpddr4 type with width 'width' and rank 'rank'
  • width: LPDDR4-Width - Channel Bit Width
  • rank: LPDDR4-Rank - Channel Rank
  • diff-rs: DifferentialRoutingStructure - Differential Routing Structure
  • rs: RoutingStructure - Single-ended Routing Structure

LPDDR4-Constraint

public defn LPDDR4-Constraint (width:LPDDR4-Width, rank:LPDDR4-Rank, diff-st:DifferentialRoutingStructure, se-st:RoutingStructure) -> LPDDR4-Constraint

  • Returns LPDDR4-Constraint

lpddr4

public defn lpddr4 (width:LPDDR4-Width, rank:LPDDR4-Rank)

lpddr4-x16

public defn lpddr4-x16 (rank:LPDDR4-Rank)

rank-to-int

public defn rank-to-int (rank:LPDDR4-Rank) -> Int

  • Returns Int

LPDDR4-Constraint

LPDDR4 SI Constraint Type

public defstruct LPDDR4-Constraint <: SI-Constraint :
    diff-route-struct: DifferentialRoutingStructure
    loss: Double
    rank: LPDDR4-Rank
    se-route-struct: RoutingStructure
    skew-ck: Toleranced
    skew-ck-ca: Toleranced
    skew-ck-cke: Toleranced
    skew-ck-cs: Toleranced
    skew-ck-dqs: Toleranced
    skew-dq-dq: Toleranced
    skew-dqs: Toleranced
    skew-dqs-dq: Toleranced
    width: LPDDR4-Width

  • diff-route-struct: DifferentialRoutingStructure - Differential Pair Routing Structure

  • loss: Double - Maximum Signal Loss

  • rank: LPDDR4-Rank - Channel Rank

  • se-route-struct: RoutingStructure - Single-Ended Routing Structure

  • skew-ck: Toleranced - CK Intra-pair Skew Limit

  • skew-ck-ca: Toleranced - CK to CA Skew Limit

  • skew-ck-cke: Toleranced - CK to CKE Skew Limit

  • skew-ck-cs: Toleranced - CK to CS Skew Limit

  • skew-ck-dqs: Toleranced - CK to DQS Skew Limit

  • skew-dq-dq: Toleranced - DQ/DMI to DQ/DMI Skew Limit

  • skew-dqs: Toleranced - DQS Intra-pair Skew Limit

  • skew-dqs-dq: Toleranced - DQS to DQ/DMI Skew Limit

  • width: LPDDR4-Width - Channel Bit Width

Values based on the LPDDR4 section of chapter 2 of https://docs.amd.com/v/u/en-US/ug583-ultrascale-pcb-design

Constraints: CK Intra-pair Skew => 0.0 ± 2.0e-12 seconds CK to CKE Skew => 0.0 ± 8.0e-12 seconds CK to CS Skew => 0.0 ± 8.0e-12 seconds CK to CA Skew => 0.0 ± 8.0e-12 seconds CK to DQS Skew => -500.0e-12 to 2500.0e-12 seconds DQS Intra-pair Skew => 0.0 ± 2.0e-12 seconds DQS to DQ/DMI Skew => 0.0 ± 5.0e-12 seconds DQ/DMI to DQ/DMI Skew => 0.0 ± 5.0e-12 seconds Maximum Signal Loss => 5.0 dB

Constructors

LPDDR4-Constraint

Constructor for defstruct LPDDR4-Constraint

public defn LPDDR4-Constraint (skew-ck:Toleranced, skew-ck-cke:Toleranced = ?, skew-ck-cs:Toleranced = ?, skew-ck-ca:Toleranced = ?, skew-ck-dqs:Toleranced = ?, skew-dqs:Toleranced = ?, skew-dqs-dq:Toleranced = ?, skew-dq-dq:Toleranced = ?, loss:Double = ?, width:LPDDR4-Width, rank:LPDDR4-Rank, diff-route-struct:DifferentialRoutingStructure, se-route-struct:RoutingStructure)

LPDDR4-Constraint

Constructor for defstruct LPDDR4-Constraint

public defn LPDDR4-Constraint ( -- skew-ck:Toleranced = ?, skew-ck-cke:Toleranced = ?, skew-ck-cs:Toleranced = ?, skew-ck-ca:Toleranced = ?, skew-ck-dqs:Toleranced = ?, skew-dqs:Toleranced = ?, skew-dqs-dq:Toleranced = ?, skew-dq-dq:Toleranced = ?, loss:Double = ?, width:LPDDR4-Width, rank:LPDDR4-Rank, diff-route-struct:DifferentialRoutingStructure, se-route-struct:RoutingStructure)

Methods

constrain

Add constraints to a LPDDR4 link

defmethod constrain (cst:LPDDR4-Constraint, src:JITXObject, dst:JITXObject) -> False

  • cst: LPDDR4-Constraint - Constraint Object.
  • src: JITXObject - Source End Point - must be of lpddr4 type and meet the constraints
  • dst: JITXObject - Destination End Point - must be of lpddr4 type and meet the constraints
  • Returns False

Channel bit width and channel rank of 'src' and 'dst' must match width and rank of 'cst'

Functions

LPDDR4-Constraint

public defn LPDDR4-Constraint (width:LPDDR4-Width, rank:LPDDR4-Rank, diff-st:DifferentialRoutingStructure, se-st:RoutingStructure) -> LPDDR4-Constraint

  • Returns LPDDR4-Constraint

LPDDR4-Width

LPDDR4 Width enums This is a fixed list of possible channel widths for LPDDR4

public defenum LPDDR4-Width <: Equalable & Hashable & JITXValue

  • LPDDR4-x16

  • LPDDR4-x32

  • LPDDR4-x64

Functions

num-x16-lanes

public defn num-x16-lanes (width:LPDDR4-Width) -> Int

  • Returns Int

connect-LPDDR4

Connect and constrain a LPDDR4 link

public defn connect-LPDDR4 (src:JITXObject, dst:JITXObject, width:LPDDR4-Width, rank:LPDDR4-Rank, diff-rs:DifferentialRoutingStructure, rs:RoutingStructure)

  • src: JITXObject - Source End Point - must be of lpddr4 type with width 'width' and rank 'rank'
  • dst: JITXObject - Destination End Point - must be of lpddr4 type with width 'width' and rank 'rank'
  • width: LPDDR4-Width - Channel Bit Width
  • rank: LPDDR4-Rank - Channel Rank
  • diff-rs: DifferentialRoutingStructure - Differential Routing Structure
  • rs: RoutingStructure - Single-ended Routing Structure

width-to-int

public defn width-to-int (width:LPDDR4-Width) -> Int

  • Returns Int

LPDDR4-Constraint

public defn LPDDR4-Constraint (width:LPDDR4-Width, rank:LPDDR4-Rank, diff-st:DifferentialRoutingStructure, se-st:RoutingStructure) -> LPDDR4-Constraint

  • Returns LPDDR4-Constraint

lpddr4

public defn lpddr4 (width:LPDDR4-Width, rank:LPDDR4-Rank)

General Definitions

lpddr4-lane

public pcb-bundle lpddr4-lane

Related Packages

Forwarded by package: jsl/protocols