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jsl/si/helpers

Package name: jsl/si/helpers

Summary

General Definitions

Function Description
daisy-chain Construct a KeyValue Daisy Chain of Ports
diff-pin-model (+ 2) Set a differential PinModel between two pins
topo-net (+ 1) Create a net and topology segment
diff-structure Assign a differential routing structure to a diff-pair topology.
max-loss Add a max acceptable loss to a set of topology terminals
insertion-loss-limit Add an insertion loss limiter for a set of endpoints.
delay-limit Add a time delay limiter for a set of endpoints.
apply-pin-model Apply pin models to all pins in a set of ports
skew-window Add a max skew timing constraint for a differential pair.
timing-window Add a timing window around the guide pin
pair-wise Construct a pair wise sequence of all passed endpoints and call f(A,B)
max-delay Set the maximum delay for the signals from A -> B in Seconds
constrain-ch Simple helper function to apply constraints to a channel

Definitions

General Definitions

daisy-chain

Construct a KeyValue Daisy Chain of Ports

public defn daisy-chain (obj:JITXObject, accessor:(JITXObject) -> JITXObject) -> KeyValue<JITXObject, JITXObject|KeyValue>|JITXObject

  • obj: JITXObject - Instance or InstanceArray of objects that we want to construct a KeyValue daisy chain for.
  • accessor: (JITXObject) -> JITXObject - Function that will be passed one of the instances from the obj Instance array (or the instance itself) to acquire the port of interest for constructing the KeyValue chain.
  • Returns KeyValue<JITXObject, JITXObject|KeyValue>|JITXObject - A recursive KeyValue chain of ports. This KeyValue object can be passed to topo-net to construct a series topology.

This function is most useful when used with an InstanceArray of components that all have the same port child. This constructs the KeyValue arguments to pass to topo-net for constructing a daisy-chain topology.

  topo-net(host.ctl => daisy-chain(mem, {_.MEM.ctl}))

diff-pin-model

Set a differential PinModel between two pins

public defn diff-pin-model (p1:JITXObject, p2:JITXObject -- delay:Toleranced, loss:Toleranced = ?)

  • p1: JITXObject - Pin A of a differential input to this component.
  • p2: JITXObject - Pin B of a differential input to this component.
  • delay: Toleranced - Expected delay due to the physical pin connections. This is used for computing the timing parameters of a topology connected to this pin.
  • loss: Toleranced - Expected loss due to the physical pin connections. This is primarily used for the insertion loss optimization on a topology.

This is a simplified model of the pin characteristics of a component.

This function must be used inside a pcb-component context.

diff-pin-model

Set a differential PinModel between the two pins of a diff-pair bundle

public defn diff-pin-model (dp:JITXObject -- delay:Toleranced, loss:Toleranced = ?)

  • dp: JITXObject - Bundle Port on a pcb-component of type diff-pair

This function must be used inside a pcb-component context.

diff-pin-model

Set a differential PinModel between the two pins of KeyValue pair

public defn diff-pin-model (pair:KeyValue<JITXObject, JITXObject> -- delay:Toleranced, loss:Toleranced = ?)

  • pair: KeyValue<JITXObject, JITXObject> - Bundle Port on a pcb-component of type diff-pair

This function must be used inside a pcb-component context.

topo-net

Create a net and topology segment

public defn topo-net (p1:JITXObject, p2:JITXObject -- name:String|Printable|False = ?)

  • p1: JITXObject - Pin object
  • p2: JITXObject - Pin object
  • name: String|Printable|False - Optional name for the constructed nets. If false then no name is applied to the net statement.

This function connects pins/ports together with a combination net and topology-segment. This is useful for constructing signal integrity routes in the design.

The pin arguments can be either single pins, pin arrays, or bundle-defined ports. Regardless, p1 and p2 must be the same type.

No direction is implied by the order of p1 and p2.

This function must be used in a pcb-module context.

topo-net

Construct a chained Topology net

public defn topo-net (pair:KeyValue<JITXObject, JITXObject|KeyValue> -- name:String|Printable|False = ?)

  • pair: KeyValue<JITXObject, JITXObject|KeyValue> - Key Value Pair (KVP) of pins or recursive KVPs of pins.
  • name: String|Printable|False - Optional name for the constructed nets. If false then no name is applied to the net statement.

Note: This function is recursive.

This function will construct a chain of topology segments using a sequence of key value pairs of pins (singles, bundles, or arrays)

This function must be used in a pcb-module context.

inst MCU : components/iMX
inst ESD : components/TPD4E05
inst USB-C : components/USBC-conn

topo-net(
  MCU.usb2.data =>
  ESD.D[0].A =>
  ESD.D[0].B =>
  USB-C.data[0] =>
  USB-C.data[1] =>
)

  • The MCU provides a USB 2.0 connection via a bundle named usb2. All of the

    referenced objects in this sequence are diff-pair bundles.

  • The ESD protection diode is a pass through variant with two equivalent sides A & B

  • The USB Type C connector has two USB 2.0 Data lines to allow reversability of the connector

  • In this statement, the topo-net function constructs 4 topology segments. The terminal

    points of the topology are MCU.usb2.data and USB-C.data[1]. There are three, ordered series nodes between the terminal points.

diff-structure

Assign a differential routing structure to a diff-pair topology.

public defn diff-structure (route-struct:DifferentialRoutingStructure, dp-pairs:KeyValue<JITXObject, JITXObject> ...)

  • route-struct: DifferentialRoutingStructure - DifferentialRoutingStructure type
  • dp-pairs: KeyValue<JITXObject, JITXObject> - KeyValue of two terminal ports of a diff-pair topology. Both the key and value of this KVP must be Bundle Ports of type `diff-pair

This function is expected to be used in a pcb-module context.

max-loss

Add a max acceptable loss to a set of topology terminals

public defn max-loss (max-dB:Double, ep-sets:KeyValue<JITXObject, JITXObject> ...)

  • max-dB: Double - Maximum loss allowed for this set of terminals. Value is in dB
  • ep-sets: KeyValue<JITXObject, JITXObject> - sequence of KeyValue<Port,Port> for the matching terminals of a topology.

This function must be called in a pcb-module context.

insertion-loss-limit

Add an insertion loss limiter for a set of endpoints.

public defn insertion-loss-limit (loss-dB:Toleranced, ep-sets:KeyValue<JITXObject, JITXObject> ...)

  • loss-dB: Toleranced - Loss range that this design is willing to accept in dB
  • ep-sets: KeyValue<JITXObject, JITXObject> - a series of endpoint pairs for the routes that we wish to adds limits on. Each KeyValue may be:
  • Pin => Pin - Single pin to add constraints to
  • Bundle => Bundle - Add individual constraints to each matching pin in the passed bundle. Must be the same type of bundle.
  • PortArray => PortArray - Add individual constraints for each port of a port array. Each PortArray must be of equal length and type.

This function must be called in a pcb-module context.

delay-limit

Add a time delay limiter for a set of endpoints.

public defn delay-limit (delay-S:Toleranced, ep-sets:KeyValue<JITXObject, JITXObject> ...)

  • delay-S: Toleranced - Delay range expected for these signals in Seconds.
  • ep-sets: KeyValue<JITXObject, JITXObject> - sequence of KeyValue<Port,Port> for the matching terminals of a topology.

This function must be called in a pcb-module context.

apply-pin-model

Apply pin models to all pins in a set of ports

public defn apply-pin-model (delay:Toleranced, loss:Toleranced = ?, ports:JITXObject ...)

  • delay: Toleranced - Pin Delay in Seconds
  • loss: Toleranced - Pin Loss in dB
  • ports: JITXObject - one or more ports to apply the pin model to.

Note: This function is recursive

skew-window

Add a max skew timing constraint for a differential pair.

public defn skew-window (window:Toleranced, pairs:KeyValue<JITXObject, JITXObject> ...)

  • window: Toleranced - Tolerance window in seconds. This would typically be a Toleranced around zero such as 0.0 +/- 10.0e-12.
  • pairs: KeyValue<JITXObject, JITXObject> - Terminal Points for either two diff-pair bundles or two port-arrays. For Diff-Pair bundles, this function adds a skew timing diff constraint between A.P => B.P / A.N => B.N For Port Arrays, this function adds a skew timing diff between the first terminal pair and each of the remaining pins.

timing-window

Add a timing window around the guide pin

public defn timing-window (window:Toleranced, guide:KeyValue<JITXObject, JITXObject>, topos:KeyValue<JITXObject, JITXObject> ...)

  • window: Toleranced - Tolerance window in seconds. This would typically be a Toleranced around zero such as 0.0 +/- 10.0e-12.
  • guide: KeyValue<JITXObject, JITXObject> - Terminal Points for the Guide Topology. All timing difference constraints will be made in reference to this topology.
  • topos: KeyValue<JITXObject, JITXObject> - Set of topologies to which we will apply timing difference constraints. Each KVP can be SinglePin => SinglePin, PortArray => PortArray, or Bundle => Bundle. For the PortArray variant, the number of pins in each port array should be equal. Note that bundles are not supported

This function adds a timing window around the guide topology. The goal is that all of the passed topos arguments will have a timing difference constraint that keeps them within the timing window around the guide.

NOTE: This function is recursive.

pair-wise

Construct a pair wise sequence of all passed endpoints and call f(A,B)

public defn pair-wise (f:(KeyValue<JITXObject, JITXObject>) -> False, ep-sets:Seqable<KeyValue<JITXObject, JITXObject>>)

  • f: (KeyValue<JITXObject, JITXObject>) -> False - Function to apply to the pair wise sequence of single pins.
  • ep-sets: Seqable<KeyValue<JITXObject, JITXObject>> - Sequence of KeyValue<Port, Port>. Each KVP is a set of topology terminals that we will pass to f. Each terminal can be a single pin, a port array, or a bundle - but it must match between key and value. We deconstruct each port array and bundle into single pins and recursively invoke pair-wise&#123;f, _} until all KVPs are processed.

NOTE: This function is recursive.

max-delay

Set the maximum delay for the signals from A -> B in Seconds

public defn max-delay (max-S:Double, ep-sets:KeyValue<JITXObject, JITXObject> ...)

  • max-S: Double - Maximum allowable delay in Seconds
  • ep-sets: KeyValue<JITXObject, JITXObject> - sequence of KeyValue<Port,Port> for the matching terminals of a topology.

This sets an absolute time delay limit for the signals on the board (as opposed to a differential skew constraint for example).

constrain-ch

Simple helper function to apply constraints to a channel This function applies a skew window and a max-loss constraint to the specified channel

public defn constrain-ch (sw:Toleranced, ml:Double, a:JITXObject, b:JITXObject)

  • sw: Toleranced - Skew window in seconds. This would typically be a Toleranced around zero such as 0.0 +/- 10.0e-12.
  • ml: Double - Max Loss is a specification for the maximum loss in dB for a connection.
  • a: JITXObject - Terminal starting point
  • b: JITXObject - Terminal ending point for either two diff-pair bundles or two port-arrays.

Related Packages

Forwarded by package: jsl/si