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High-Speed Routing

You can follow along with the tutorial in the video above. Below is a written version of the key steps and code for quick reference.

Before Starting

You should have built the design from Tutorial: Power circuits and power layout.

1. Introduction

This tutorial demonstrates how to route high-speed signals (specifically Gigabit Ethernet) in JITX. It covers pin swapping, adding ESD diodes inline, specifying a 100 Ω differential structure, checking skew, and automatically inserting length-compensation “bumps.”

2. Resources

3. Overview

This guide covers:

  • Gigabit Ethernet Connectors – how to add RJ45 modules from the library
  • Pin Assignment (Swapping) – letting JITX reassign pairs for easier routing
  • Substrate & Impedance – specifying a 100 Ω differential structure and checking skew
  • Multi-Stage Topology – including ESD diodes in-line
  • Length Matching – automatically adding “bumps” to meet Gigabit constraints

4. Add the Ethernet Connectors

  1. Use a parametric library part for RJ45, such as JD0-0001NL from connectors: 
    inst ethernet-jack : connectors/components/JD0-0001NL/connector[2]

  2. This creates two RJ45 connectors, each with integrated magnetics, LED pins, and the MDI (media-dependent interface) for 1000Base-T signals.

  3. After compilation, you will see these connectors in your schematic and on the board.

5. Pin Assignment & MDI Bundles

5.1 Using “Require” for MDI

You can use require statements to connect to interfaces using swappable pin assignment

require eth0 : MDI-1000Base-T from ethernet-jack[0]
require eth1 : MDI-1000Base-T from ethernet-jack[1]

net (eth0 eth1)
  • This automatically connects all RX/TX differential pins for each connector.
  • JITX can also swap or reassign these differential pairs automatically during routing, indicated by purple rat lines.

More on require More on supports

6. Substrate & Impedance Constraints

6.1 Substrate Model

High-speed lines need controlled impedance. helpers.stanza defines the board stackup:

public val substrate = jlc-pcb/stackups/JLC04161H-1080/JLC04161H-1080()
  • This substrate includes layer definitions, copper thickness, DFM rules, and impedance controlled routing rules.
  • Changing the substrate automatically updates routed geometries to maintain correct impedance.

6.2 MDI-1000Base-T Constraint

Specify a 100 Ω differential structure and its skew/loss limits:

val mdi-constraint = MDI-1000Base-T-Constraint(
  route-struct = diff-routing-struct(substrate, 100)  ; 100 ohms
)
  • This enforces 100 Ω differential routing and manages MDI skew and loss parameters.

More on MDI

7. Multi-Stage Topology: ESD Protection

7.1 ESD Diodes

For Gigabit Ethernet, add ESD or TVS diodes between the RJ45 and the PHY. In code:

val esd = diodes/ESD224DQAR/create-esd-pool(4, GND)
  • Creates a “pool” of ESD diodes sufficient for 4 differential pairs.
  • Each pair passes through these diodes on the way to the switch.

7.2 Switch & Constrain-Topology

Include your Ethernet switch (e.g., KSZ9563) and define the pass-through path from the switch MDI to the RJ45:

inst netsw : microchip-networking/components/KSZ9563/circuit(substrate)

for i in 0 to 2:
  require eth : MDI-1000Base-T from ethernet-jack[i]
  require sw-mdi : microchip-networking/components/KSZ9563/MDI-1000BaseT-With-LEDs from netsw.netsw

  within [src, dst] = constrain-topology(sw-mdi.MDI => eth, mdi-constraint):
    require protected-pairs:dual-pair[4] from esd
    for p in 0 to 4:
      topo-pair(src.TP[p] => protected-pairs[p].A => protected-pairs[p].B => dst.TP[p])
  • Signals physically flow Switch → ESD → RJ45.
  • The same constraints (skew, loss, etc.) apply end to end.

8. High-Speed Routing & Skew Matching

8.1 Differential Routing

  • Use Shift + I to add insertion points for differential pairs.
  • Press Q to autoroute pairs with the correct spacing.
  • Manual approach:
  • Shift + Q to enter manual routing mode.
  • Ctrl + A to see valid pin swaps (purple lines show swappable pins).

8.2 Length Matching

  1. Check the “Issues” panel for skew or mismatch warnings.
  2. Add control points (hold 2 + click/drag) for length matching segments.
  3. Size segments for length matching; JITX automatically inserts serpentine “bumps” or “loops” to correct skew.

Setting length matching

9. Final Checks

  • The “Issues” panel shows any remaining mismatches or constraints (e.g., skew, length, or topology).
  • Once no warnings remain, your Gigabit lines meet design rules and constraints.

10. Practical Tips

  1. Place ESD Diodes Near Connectors or PHY
  2. Short paths help reduce EMI and improve protection.
  3. Use Substrate Definitions
  4. Code-based geometry auto-updates if the stackup changes.
  5. Pin Swaps
  6. Let JITX handle reassignments to avoid crossing lines. Purple rat lines indicate swappable pins.
  7. Length Matching
  8. Adjust control points or region size for serpentines.
  9. Monitor the Issues panel to confirm no remaining skew.