jitxexamples.jumpstart_kits.js1_stackup_components.versal_fpga package#

JS1 Part 2 reference solution: AMD Versal Premium VP1002 FPGA (NFVI1369).

A 1369-ball BGA component generated from the AMD package pinout file (tools/generate_pinout.py), plus the circuit wrapper that exposes its power rails, ground domains, and GTM transceiver quads as a JITX-native boundary.

The two names below are re-exported lazily (PEP 562). Both submodules they come from import jitx, and this package sits on the import path of python -m ...versal_fpga.tools.generate_pinout – so an eager re-export makes the documented command fail with ModuleNotFoundError unless jitx is installed. The generator is deliberately stdlib-only precisely so it can run without a jitx environment; TestGenerator.test_runs_without_jitx seals that. Keep these lazy.

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