MT53E1G32D2FW_046_WT_B module

Micron MT53E1G32D2FW-046 WT:B LPDDR4X/LPDDR4 SDRAM.

32 Gb (4 GB), 1 Gig x 32: two dies, two x16 channels (A and B), dual rank, in a 200-ball TFBGA, 10 mm x 14.5 mm x 1.1 mm (package code FW).

Source: Micron, LPDDR4X/LPDDR4 SDRAM data sheet (z42m_embedded_lpddr4x_lpddr4.pdf, Rev. I, 04/2023), https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/8606/z42m-embedded-lpddr4x-lpddr4.pdf. Checked against it:

• Part number, density and organization: Figure 1 (part number chart) and Table 2 (part number list).

• Ball map: Figure 6, “200-Ball Dual-Channel, Dual-Rank Discrete FBGA”. Every one of the 200 balls is mapped here, including the 12 DNU and 5 NC balls.

• Grid and body: Figure 10, “200-Ball TFBGA - 10mm x 14.5mm x 1.1mm (Package Code: FW)”: 22 rows at 0.65 mm pitch, 12 columns at 0.8 mm pitch, body 10 +/-0.1 mm by 14.5 +/-0.1 mm, height 1 +/-0.1 mm. Columns 6 and 7 and rows L and M carry no balls.

The data sheet gives the package’s ball pads (0.40 mm SMD) but no PCB land size. The land here is 0.40 mm to match them; check it against your fabricator’s BGA rules.

class FW200Depopulation

Bases: GridPlanner

No balls in columns 6 and 7 or rows L and M of the 22 x 12 grid.

is_active(pos, num_rows, num_cols)

Determine if a pad is active based on the row and column.

Parameters:

• pos (GridPosition) – The grid location to check.

• num_rows (int) – The total number of rows in the grid.

• num_cols (int) – The total number of columns in the grid.

Return type:

bool | None

Returns:

True if the pad is active, False if the pad is inactive. Returns None if this planner does not specify whether this pad is active or inactive (the decision is deferred to the next planner in the composition). If all planners return None for a pad, the pad is considered active by default.

class FW200Landpattern

Bases: BGA

200-ball TFBGA, package code FW: 12 columns at 0.8 mm, 22 rows at 0.65 mm, columns 6 and 7 and rows L and M empty.

AA: dict[int, Pad]

AB: dict[int, Pad]

class MT53E1G32D2FW_046_WT_B(*args, **kwargs)

Bases: Component

Micron MT53E1G32D2FW-046 WT:B, 32 Gb LPDDR4X/LPDDR4, x32, dual rank.

The LPDDR4 signals are the leaves of the lpddr4 bundle; the other balls keep their data sheet names, with one port per supply or ground name.

reference_designator_prefix: str | None = 'U'

Reference designator prefix for this component. This will be used to generate a unique reference designator for each component of the same type.

Note

This field is a required data point for matching components between builds. If this value changes (including changing from unset to set), it will be treated as a new component, even if nothing else changes.

mpn: str | None = 'MT53E1G32D2FW-046 WT:B'

Manufacturer part number for this component.

manufacturer: str | None = 'Micron'

Manufacturer for this component.

lpddr4 = LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>)

LPDDR4 interface. ch[0] is channel A and ch[1] channel B; in each channel byte lane d[0] is DQ0 to DQ7 and d[1] DQ8 to DQ15. ck.p/ck.n are CK_t/CK_c and dqs.p/dqs.n are DQS_t/DQS_c.

ODT_CA_A = Port()

ODT_CA_B = Port()

RESET_n = Port()

ZQ0 = Port()

ZQ1 = Port()

VDD1 = Port()

VDD2 = Port()

VDDQ = Port()

VSS = Port()

NC = Port()

No connect (5 balls)

DNU = Port()

Do not use (12 corner balls)

landpattern = FW200Landpattern()

symbol = BoxSymbol()

mapping = [PadMapping({LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[0]: FW200Landpattern().B[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[7]: FW200Landpattern().B[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[7]: FW200Landpattern().B[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[0]: FW200Landpattern().B[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[1]: FW200Landpattern().C[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dmi: FW200Landpattern().C[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[6]: FW200Landpattern().C[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[6]: FW200Landpattern().C[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dmi: FW200Landpattern().C[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[1]: FW200Landpattern().C[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dqs.p: FW200Landpattern().D[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dqs.p: FW200Landpattern().D[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[2]: FW200Landpattern().E[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dqs.n: FW200Landpattern().E[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[5]: FW200Landpattern().E[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[5]: FW200Landpattern().E[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dqs.n: FW200Landpattern().E[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[2]: FW200Landpattern().E[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[3]: FW200Landpattern().F[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[0].dq[4]: FW200Landpattern().F[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[4]: FW200Landpattern().F[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].d[1].dq[3]: FW200Landpattern().F[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[0]: FW200Landpattern().H[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].cs[1]: FW200Landpattern().H[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].cs[0]: FW200Landpattern().H[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[2]: FW200Landpattern().H[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[3]: FW200Landpattern().H[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[4]: FW200Landpattern().H[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[1]: FW200Landpattern().J[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].cke[0]: FW200Landpattern().J[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].cke[1]: FW200Landpattern().J[5], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ck.p: FW200Landpattern().J[8], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ck.n: FW200Landpattern().J[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[0].ca[5]: FW200Landpattern().J[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[1]: FW200Landpattern().P[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].cke[0]: FW200Landpattern().P[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].cke[1]: FW200Landpattern().P[5], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ck.p: FW200Landpattern().P[8], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ck.n: FW200Landpattern().P[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[5]: FW200Landpattern().P[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[0]: FW200Landpattern().R[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].cs[1]: FW200Landpattern().R[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].cs[0]: FW200Landpattern().R[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[2]: FW200Landpattern().R[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[3]: FW200Landpattern().R[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].ca[4]: FW200Landpattern().R[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[3]: FW200Landpattern().U[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[4]: FW200Landpattern().U[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[4]: FW200Landpattern().U[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[3]: FW200Landpattern().U[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[2]: FW200Landpattern().V[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dqs.n: FW200Landpattern().V[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[5]: FW200Landpattern().V[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[5]: FW200Landpattern().V[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dqs.n: FW200Landpattern().V[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[2]: FW200Landpattern().V[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dqs.p: FW200Landpattern().W[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dqs.p: FW200Landpattern().W[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[1]: FW200Landpattern().Y[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dmi: FW200Landpattern().Y[3], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[6]: FW200Landpattern().Y[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[6]: FW200Landpattern().Y[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dmi: FW200Landpattern().Y[10], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[1]: FW200Landpattern().Y[11], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[0]: FW200Landpattern().AA[2], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[0].dq[7]: FW200Landpattern().AA[4], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[7]: FW200Landpattern().AA[9], LPDDR4(<LPDDR4Width.x32: 32>, <LPDDR4Rank.Rank2: 2>).ch[1].d[1].dq[0]: FW200Landpattern().AA[11], Port(): [FW200Landpattern().A[1], FW200Landpattern().A[2], FW200Landpattern().A[11], FW200Landpattern().A[12], FW200Landpattern().B[1], FW200Landpattern().B[12], FW200Landpattern().AA[1], FW200Landpattern().AA[12], FW200Landpattern().AB[1], FW200Landpattern().AB[2], FW200Landpattern().AB[11], FW200Landpattern().AB[12]], Port(): [FW200Landpattern().A[3], FW200Landpattern().A[10], FW200Landpattern().C[1], FW200Landpattern().C[5], FW200Landpattern().C[8], FW200Landpattern().C[12], FW200Landpattern().D[2], FW200Landpattern().D[4], FW200Landpattern().D[9], FW200Landpattern().D[11], FW200Landpattern().E[1], FW200Landpattern().E[5], FW200Landpattern().E[8], FW200Landpattern().E[12], FW200Landpattern().G[1], FW200Landpattern().G[3], FW200Landpattern().G[5], FW200Landpattern().G[8], FW200Landpattern().G[10], FW200Landpattern().G[12], FW200Landpattern().J[1], FW200Landpattern().J[3], FW200Landpattern().J[10], FW200Landpattern().J[12], FW200Landpattern().K[2], FW200Landpattern().K[4], FW200Landpattern().K[9], FW200Landpattern().K[11], FW200Landpattern().N[2], FW200Landpattern().N[4], FW200Landpattern().N[9], FW200Landpattern().N[11], FW200Landpattern().P[1], FW200Landpattern().P[3], FW200Landpattern().P[10], FW200Landpattern().P[12], FW200Landpattern().T[1], FW200Landpattern().T[3], FW200Landpattern().T[5], FW200Landpattern().T[8], FW200Landpattern().T[10], FW200Landpattern().T[12], FW200Landpattern().V[1], FW200Landpattern().V[5], FW200Landpattern().V[8], FW200Landpattern().V[12], FW200Landpattern().W[2], FW200Landpattern().W[4], FW200Landpattern().W[9], FW200Landpattern().W[11], FW200Landpattern().Y[1], FW200Landpattern().Y[5], FW200Landpattern().Y[8], FW200Landpattern().Y[12], FW200Landpattern().AB[3], FW200Landpattern().AB[5], FW200Landpattern().AB[8], FW200Landpattern().AB[10]], Port(): [FW200Landpattern().A[4], FW200Landpattern().A[9], FW200Landpattern().F[5], FW200Landpattern().F[8], FW200Landpattern().H[1], FW200Landpattern().H[5], FW200Landpattern().H[8], FW200Landpattern().H[12], FW200Landpattern().K[1], FW200Landpattern().K[3], FW200Landpattern().K[10], FW200Landpattern().K[12], FW200Landpattern().N[1], FW200Landpattern().N[3], FW200Landpattern().N[10], FW200Landpattern().N[12], FW200Landpattern().R[1], FW200Landpattern().R[5], FW200Landpattern().R[8], FW200Landpattern().R[12], FW200Landpattern().U[5], FW200Landpattern().U[8], FW200Landpattern().AB[4], FW200Landpattern().AB[9]], Port(): FW200Landpattern().A[5], Port(): FW200Landpattern().A[8], Port(): [FW200Landpattern().B[3], FW200Landpattern().B[5], FW200Landpattern().B[8], FW200Landpattern().B[10], FW200Landpattern().D[1], FW200Landpattern().D[5], FW200Landpattern().D[8], FW200Landpattern().D[12], FW200Landpattern().F[3], FW200Landpattern().F[10], FW200Landpattern().U[3], FW200Landpattern().U[10], FW200Landpattern().W[1], FW200Landpattern().W[5], FW200Landpattern().W[8], FW200Landpattern().W[12], FW200Landpattern().AA[3], FW200Landpattern().AA[5], FW200Landpattern().AA[8], FW200Landpattern().AA[10]], Port(): [FW200Landpattern().F[1], FW200Landpattern().F[12], FW200Landpattern().G[4], FW200Landpattern().G[9], FW200Landpattern().T[4], FW200Landpattern().T[9], FW200Landpattern().U[1], FW200Landpattern().U[12]], Port(): FW200Landpattern().G[2], Port(): [FW200Landpattern().G[11], FW200Landpattern().K[5], FW200Landpattern().K[8], FW200Landpattern().N[5], FW200Landpattern().N[8]], Port(): FW200Landpattern().T[2], Port(): FW200Landpattern().T[11]})]