straps module#

Strap-in configuration of the KSZ9031RNX.

Transcribed from Table 2-2 (“Strap-In Options - KSZ9031RNX”) of data sheet DS00002117K. Each strap-in function is latched from the level on its pin at power-up or reset: a pull-up latches 1, a pull-down latches 0. The strap pins have no internal pull (Table 2-1 types them I/O, and Table 6-6 lists internal pull-ups only on MDC, MDIO and RESET_N), so every strap pin takes an external resistor for every configuration.

Pin	Pin name	Strap function	Value
35	RX_CLK	PHYAD2	PHY address bit 2
15	LED2	PHYAD1	PHY address bit 1
17	LED1	PHYAD0	PHY address bit 0
27	RXD3	MODE3	`Mode` code bit 3
28	RXD2	MODE2	`Mode` code bit 2
31	RXD1	MODE1	`Mode` code bit 1
32	RXD0	MODE0	`Mode` code bit 0
33	RX_DV	CLK125_EN	1 enables the 125 MHz CLK125_NDO output
41	CLK125_NDO	LED_MODE	1 is single-LED, 0 tri-color dual-LED

class Strap(*values)[source]#

Bases: Enum

A strap-in function of Table 2-2, valued by the pin number carrying it.

PHYAD2 = 35#

PHYAD1 = 15#

PHYAD0 = 17#

MODE3 = 27#

MODE2 = 28#

MODE1 = 31#

MODE0 = 32#

CLK125_EN = 33#

LED_MODE = 41#

class Mode(*values)[source]#

Bases: Enum

The MODE[3:0] codes Table 2-2 defines, valued by the 4-bit code.

The codes it marks “Reserved - not used” (0000 to 0011, 0101, 0110, 1000 to 1011) have no member, so Mode(0b0101) raises ValueError.

NAND_TREE = 4#

CHIP_POWER_DOWN = 7#

RGMII_1000_FULL = 12#: RGMII, advertise 1000BASE-T full-duplex only.

RGMII_1000_FULL_HALF = 13#: RGMII, advertise 1000BASE-T full- and half-duplex only.

RGMII_ALL_EXCEPT_1000_HALF = 14#: RGMII, advertise 10/100/1000 half- and full-duplex except 1000BASE-T half-duplex.

RGMII_ALL = 15#: RGMII, advertise 10/100/1000 half- and full-duplex.

class LedMode(*values)[source]#

Bases: Enum

LED_MODE, valued by the latched bit.

TRI_COLOR_DUAL = 0#

SINGLE = 1#

class StrapConfig(phy_address=0, mode=Mode.RGMII_ALL, clk125_output=False, led_mode=LedMode.SINGLE)[source]#

Bases: object

The configuration the strap resistors latch.

Parameters:

phy_address (int) – PHYAD[2:0], 0 to 7. Address bits [4:3] are always 00.
mode (Mode) – MODE[3:0].
clk125_output (bool) – CLK125_EN, whether CLK125_NDO drives a 125 MHz clock.
led_mode (LedMode) – LED_MODE.

Raises:

ValueError – phy_address is outside 0 to 7.

phy_address: int = 0#

mode: Mode = 15#

clk125_output: bool = False#

led_mode: LedMode = 1#

level(strap)[source]#

The level strap latches: True for a pull-up, False for a pull-down.

Return type:: bool
Parameters:: strap (Strap)

DEFAULT_STRAPS = StrapConfig(phy_address=0, mode=<Mode.RGMII_ALL: 15>, clk125_output=False, led_mode=<LedMode.SINGLE: 1>)#: PHY address 0, every RGMII mode advertised, CLK125_NDO off, single-LED mode.