Release Notes#

4.6#

Python API#

4.6.0#

New Features

- Scripted interactive layout: create and modify routes, vias, control
  points, pours and area regions on a running design, and monitor layout
  events using python scripts.
- Route configuration from scene graph code.
- Design issues, including signal integrity issues, reported back to
  Python, and a new `jitx design issues` command.
- New `jitx design session` and `jitx design exec` commands to hold a
  design open and run scripts against it.
- Pad entry points on land patterns.
- Questions from the runtime can be answered at the console or the UI
- Common value string rendering, including RKM codes.
- Reworked net-naming algorithm. Nets are named after their Python names,
  and subnets after their base net, e.g. `pair_net.p`. Warnings for net name
  collisions. Introduced a new `labeled` option to control whether a label
  shows or not instead of the name argument.

Improvements

- Warning when length matched routes do not end in control points.
- Dropped code routes are reported as design issues.
- Backdrills always generate a solder mask opening.
- `design.nets()` and `design.layers()` are deprecated and have been turned
  into properties.

Bug Fixes

- Fixes to captured code pours and vias.
- Documentation fixes, notably for the substrate API.
- Other minor fixes.

Standard Library#

4.6.0#

New Features

- `OpAmpUnitSymbol`, an op-amp symbol without supply pins for
  multi-amplifier parts.

Improvements

- Faster box symbol bounds computation.

Bug Fixes

- Fixed pad lookup with alphanumeric (A1 style) grid numbering.
- Documentation fixes.

JITX Runtime#

4.6.0#

New Features

- Support for the interactive Python layout API.
- Route configuration from scene graph code.
- Reference designator assignment.
- Design issues reported back to Python.
- Pad entry points.
- Signal constraints without an explicit topology.
- Questions from the runtime are shown as a dialog, and constraint check
  results in an info dialog.

Improvements

- Nets are named after their Python names, with changes to how nets are
  labeled in the schematic.
- New length matching solver, fixing solver crashes and dropped
  constraints.
- Pours and implicit vias use the actual board shape.
- Pours keep holes in their shapes.
- Length matching failures are reported per route instead of failing the
  whole physical design.
- Better error reporting for routing and constraint design issues.
- Removed stale and deprecated parts of the product (design explorer, parts
  database, BOM visualizer, check report and Altium extension).

Bug Fixes

- Blocked routes are retried when their configuration changes.
- Fixed pours dropping connections and via fencing issues.
- Fixed duplicate unroute in the operations history.
- Stitching and fence vias no longer double up.
- Fixed a length matching crash near the board edge.
- Fixed copper shown on the wrong side in the UI.
- Fixed missing ratsnest to vias placed from code.
- Fixed clearance handling for plated holes without an annular ring.
- Other minor fixes.

Unsupported Features#

  • Tags defined in the design are not yet available through the interactive API.

Known Issues#

  • Pin assignment support in the interactive API is limited. Explicit Net connections return a valid solution, but the solution may not be optimal. The design can still be queried for provides/requires.

4.4#

Python API#

4.4.3#

Bug Fixes

- Board layout capture now reports one feature per polygon.
- Documentation fixes.

4.4.2#

Bug Fixes

- Improved handling of arcs in captured board layout geometry.

4.4.1#

Bug Fixes

- Fixed holes in captured board layout geometry.
- Other minor fixes.

4.4.0#

New Features

- Capture the board layout in Python, populating placements and computed
  geometry into the design scene graph object for introspection.
- A standardized export plugin interface to incorporate a user-land export
  plugin into the CLI commands.
- Virtual connections (experimental): declare two endpoints connected
  without JITX routing them. Useful for off-board connections or when doing
  custom overlappable shapes.

Bug Fixes

- Fixes to routes, control points and vias defined from code.
- Other minor fixes.

Standard Library#

4.4.0#

Improvements

- Land patterns corrected against IPC-7351B and component datasheets.
- Default IPC density level is now B (nominal).
- Via structures updated for topology vias and routes.

Bug Fixes

- Fixed via discovery in ground cages.

JITX Runtime#

4.4.3#

Improvements

- Faster schematic rendering.

Bug Fixes

- Routes defined from code now update when their endpoints change.
- Fixed an error when adding overlappable copper.
- Minor UI fixes.

4.4.2#

Improvements

- Faster ratsnest computation.

Bug Fixes

- Fixed issue where the runtime connection was affected by HTTP proxy
  settings on some windows versions
- Pour and area select fixes.

4.4.1#

Bug Fixes

- Blocked routes now persist across design reruns.
- Ratsnest fixes for pin assignment.
- Fixes to routes and control points defined from code.
- Length tuning errors no longer fail the whole route.
- Other minor fixes.

4.4.0#

Improvements

- Support for capturing the board layout in Python.
- More stable routes, control points and vias across runs.

Bug Fixes

- Various routing and export fixes.
- Other minor fixes.

4.2#

Python API#

4.2.0#

New Features

- Define routes from code.
- Define control points from code.
- Tag routes and control points.
- Add new design constraints.
- Add overlappable copper.

Bug Fixes

- Vias under pads no longer require a routing structure on the pad layer.
- Other minor fixes.

JITX Runtime#

4.2.0#

Improvements

- Add route-to-pour connections.
- New board command shortcuts and UI improvements.
- ODB++ export now supports tented vias.

Bug Fixes

- Better routing, via stabilization along with pour fixes.
- Various export and geometry fixes.
- Minor UI and error-message fixes.
- Other minor fixes.

4.0#

Python API#

4.0.4#

Bug Fixes

- Add checks for overlapping pins in symbols to avoid runtime error.
- Add handling of inadvertent += on Ports.

4.0.3#

Bug Fixes

- Minor bug fix in error handling of dependency check.

4.0.2#

Bug Fixes

- Better handling of dependency check.

4.0.1#

- Initial release of the Python API

JITX Runtime#

4.0.6#

Bug Fixes

- Fixed issues in export and cache.
- Fixed minor issues in region creation.
- Fixed issue in the router if geometry was overlapping in complex ways.
- Other minor fixes.

4.0.5#

Bug Fixes

- Fixed crash in pour shape computation on Windows.

4.0.4#

Backport

- STEP export is now available in the extension sidebar

4.0.3#

Bug Fixes

- Fixed regression in schematic net label rendering

4.0.2#

Bug Fixes

- Fixed issues with route stability.
- Resolved issue when copying circuits in the board layout.
- Other minor fixes.

4.0.1#

Bug Fixes

- Various minor UI bug fixes in the vscode extension.
- Fix various minor issues in routing and pin assignment.
- Minor fixes of geometry edge cases in the route realization.

4.0.0#

- Initial release of the Python driven version of JITX