rmii module#

RMII (Reduced Media Independent Interface)#

RMII is a simplified Ethernet PHY interface that reduces pin count compared to MII by using a higher clock frequency (50MHz vs 25MHz) and fewer data lines.

Key characteristics:

  • 2-bit data bus (vs 4-bit in MII)

  • 50MHz reference clock

  • Active-low chip select multiplexed signals

  • Typically used for 10/100 Mbps Ethernet

Signals:

txd[0:1]: Transmit data (2 bits) rxd[0:1]: Receive data (2 bits) ref_clk: 50MHz reference clock tx_en: Transmit enable crs_dv: Carrier sense / data valid (multiplexed) rx_er: Receive error (optional)

>>> from jitxlib.protocols.ethernet.mii.rmii import RMII
>>> class EthernetCircuit(Circuit):
...     mac = MACController()
...     phy = EthernetPHY()
...     def __init__(self):
...         rmii = self.mac.require(RMII)
...         self.rmii_net = rmii + self.phy.rmii
...         # Apply signal integrity constraints
...         self += RMII.Constraint().apply(rmii, self.phy.rmii)

See also

mii: Full 4-bit MII interface gmii: Gigabit MII (8-bit) rgmii: Reduced Gigabit MII

class RMII(rx_er=False)[source]#

Bases: Port

Parameters:

rx_er (Port | None)

txd = (Port(), Port())#

Transmit Data Bus

rxd = (Port(), Port())#

Receive Data Bus

ref_clk = Port()#

Ref Clock (50MHz)

tx_en = Port()#

Transmit Enable

crs_dv = Port()#

Multiplexed Carrier Sense and Data Valid Line

rx_er: Port | None = None#

Receive Error Line

class Standard[source]#

Bases: object

bus_skew = Toleranced(0, 2e-09, 2e-09)#

Allowed skew in seconds.

RMII Databus Skew Specification

This is a guideline specification. RMII v1.2 does not specify guidance because the 50MHz clock rate and TTL levels don’t typically have issues meeting clock setup and hold times (See section 7.2).

The default value provided by this function is 2nS which should be well within in the setup (4ns) and hold (2ns) expectation for a 20nS (50MHz) period. See section 7.4.

loss = 16.0#

Max loss in dB.

RMII Databus Max Loss Specification

This a guideline specification. The RMII v1.2 does not specify any guidance for the max loss of the signals in the bus.

impedance = Toleranced(50, 2.5, 2.5)#
class Constraint(standard=None, structure=None)[source]#

Bases: SignalConstraint[RMII]

Parameters:
constrain(src, dst)[source]#

Called to apply implementation specific constraints. Note that all constraints should be added to the container by calling add() on self. It is valid to just set member attributes as well, as with everything in JITX, but be aware that your constraint may be used multiple times with different topologies, and thus be careful with overwriting values (e.g. some constraints may use a single DiffPairConstraint to constrain all its diff pairs).

Parameters: