import jitx
from jitx.sample import SampleDesign
from jitx.net import Port
from jitx.net import provide
from jitx.common import GPIO
from jitx.toleranced import Toleranced
from jitxlib.landpatterns.generators.qfp import QFP
from jitxlib.landpatterns.leads import LeadProfile, SMDLead
from jitxlib.landpatterns.leads.protrusions import SmallGullWingLeads
from jitxlib.protocols.serial import I2C
from jitxlib.symbols.box import BoxSymbol
from .parts import AT24C08C
#########################
# STM32H7 Partial Component definition
#########################
[docs]
class STM32H7(jitx.Component):
manufacturer = "STMicro"
mpn = "STM32H7A3ZIT6"
VDD = [Port() for _ in range(12)]
VSS = [Port() for _ in range(13)]
PA = [Port() for _ in range(16)]
PB = [Port() for _ in range(16)]
PC = [Port() for _ in range(16)]
PD = [Port() for _ in range(16)]
PE = [Port() for _ in range(16)]
PF = {i: Port() for i in [6, 7, 8, 9, 10, 11, 14, 15]}
PG = {i: Port() for i in [6, 7, 8, 9, 10, 11, 14]}
PH = {i: Port() for i in [0, 1]}
lp = QFP(num_leads=144).lead_profile(
LeadProfile(
span=Toleranced.min_max(22.0, 22.0),
pitch=0.5,
type=SMDLead(
length=Toleranced.min_max(0.45, 0.75),
width=Toleranced.min_max(0.17, 0.27),
lead_type=SmallGullWingLeads,
),
)
)
symb = BoxSymbol()
PA_mapping = jitx.PadMapping(
{
PA[0]: lp.p[37],
PA[1]: lp.p[38],
PA[2]: lp.p[39],
PA[3]: lp.p[40],
PA[4]: lp.p[43],
PA[5]: lp.p[44],
PA[6]: lp.p[45],
PA[7]: lp.p[46],
PA[8]: lp.p[97],
PA[9]: lp.p[98],
PA[10]: lp.p[99],
PA[11]: lp.p[100],
PA[12]: lp.p[101],
PA[13]: lp.p[102],
PA[14]: lp.p[107],
PA[15]: lp.p[108],
}
)
PB_mapping = jitx.PadMapping(
{
PB[0]: lp.p[49],
PB[1]: lp.p[50],
PB[2]: lp.p[51],
PB[3]: lp.p[130],
PB[4]: lp.p[131],
PB[5]: lp.p[132],
PB[6]: lp.p[133],
PB[7]: lp.p[134],
PB[8]: lp.p[136],
PB[9]: lp.p[137],
PB[10]: lp.p[66],
PB[11]: lp.p[67],
PB[12]: lp.p[72],
PB[13]: lp.p[73],
PB[14]: lp.p[74],
PB[15]: lp.p[75],
}
)
PC_mapping = jitx.PadMapping(
{
PC[0]: lp.p[28],
PC[1]: lp.p[29],
PC[2]: lp.p[30],
PC[3]: lp.p[31],
PC[4]: lp.p[47],
PC[5]: lp.p[48],
PC[6]: lp.p[93],
PC[7]: lp.p[94],
PC[8]: lp.p[95],
PC[9]: lp.p[96],
PC[10]: lp.p[109],
PC[11]: lp.p[110],
PC[12]: lp.p[111],
PC[13]: lp.p[9],
PC[14]: lp.p[10],
PC[15]: lp.p[11],
}
)
PD_mapping = jitx.PadMapping(
{
PD[0]: lp.p[112],
PD[1]: lp.p[113],
PD[2]: lp.p[114],
PD[3]: lp.p[115],
PD[4]: lp.p[116],
PD[5]: lp.p[117],
PD[6]: lp.p[120],
PD[7]: lp.p[121],
PD[8]: lp.p[76],
PD[9]: lp.p[77],
PD[10]: lp.p[78],
PD[11]: lp.p[81],
PD[12]: lp.p[82],
PD[13]: lp.p[83],
PD[14]: lp.p[84],
PD[15]: lp.p[85],
}
)
PE_mapping = jitx.PadMapping(
{
PE[0]: lp.p[138],
PE[1]: lp.p[139],
PE[2]: lp.p[1],
PE[3]: lp.p[2],
PE[4]: lp.p[3],
PE[5]: lp.p[4],
PE[6]: lp.p[5],
PE[7]: lp.p[57],
PE[8]: lp.p[58],
PE[9]: lp.p[59],
PE[10]: lp.p[60],
PE[11]: lp.p[61],
PE[12]: lp.p[62],
PE[13]: lp.p[63],
PE[14]: lp.p[64],
PE[15]: lp.p[65],
}
)
PF_mapping = jitx.PadMapping(
{
PF[6]: lp.p[20],
PF[7]: lp.p[21],
PF[8]: lp.p[22],
PF[9]: lp.p[23],
PF[10]: lp.p[24],
PF[11]: lp.p[52],
PF[14]: lp.p[53],
PF[15]: lp.p[54],
}
)
PG_mapping = jitx.PadMapping(
{
PG[6]: lp.p[86],
PG[7]: lp.p[87],
PG[8]: lp.p[88],
PG[9]: lp.p[122],
PG[10]: lp.p[123],
PG[11]: lp.p[124],
PG[14]: lp.p[125],
}
)
PH_mapping = jitx.PadMapping(
{
PH[0]: lp.p[25],
PH[1]: lp.p[26],
}
)
def __init__(self):
self.VDD_mapping = jitx.PadMapping(
{
self.VDD[i]: self.lp.p[j]
for i, j in enumerate(
[7, 13, 19, 32, 42, 56, 71, 79, 92, 106, 129, 144]
)
}
)
self.VSS_mapping = jitx.PadMapping(
{
self.VSS[i]: self.lp.p[j]
for i, j in enumerate(
[6, 12, 18, 33, 41, 55, 69, 80, 89, 104, 118, 128, 141]
)
}
)
# Other ports would also get defined
# for example:
# VBAT = Port()
# VDDSMPS = Port()
# VFBSMPS = Port()
# VLXSMPS = Port()
# VSSSMPS = Port()
# VDDA = Port()
# VSSA = Port()
# VREF = Port()
#########################
# Microcontroller Circuit Example
# Here we define the pin assignment provide offerings
# for the STM32H7
#########################
[docs]
class MCU(jitx.Circuit):
"""STM32H7 Microcontroller Wrapper Circuit"""
U = STM32H7()
###############################
# GPIO Pin Assignment
###############################
@provide.all_of(GPIO)
def P_GPIO(self, b: GPIO):
ports = [
self.U.PA,
self.U.PB,
self.U.PC,
self.U.PD,
self.U.PE,
*[dictPort.values() for dictPort in [self.U.PF, self.U.PG, self.U.PH]],
]
allGPIOs = [x for port in ports for x in port]
return [{b.gpio: p} for p in allGPIOs]
###############################
# I2C1 Pin Assignment
###############################
[docs]
class I2C1_SCL(Port):
p = Port()
@provide.one_of(I2C1_SCL)
def I2C1_SCLs(self, b: I2C1_SCL):
return [{b.p: p} for p in [self.U.PB[6], self.U.PB[8]]]
[docs]
class I2C1_SDA(Port):
p = Port()
@provide.one_of(I2C1_SDA)
def I2C1_SDAs(self, b: I2C1_SDA):
return [{b.p: p} for p in [self.U.PB[7], self.U.PB[9]]]
@provide(I2C)
def I2C1_Ports(self, b: I2C):
sclProv = self.require(self.I2C1_SCL)
sdaProv = self.require(self.I2C1_SDA)
return [{b.scl: sclProv.p, b.sda: sdaProv.p}]
[docs]
class I2CExample(jitx.Circuit):
mcu = MCU()
eeprom = AT24C08C()
def __init__(self):
# Pull a GPIO offer from the microcontroller
# and connect it to a pin on one of the
# accessory components.
io = self.mcu.require(GPIO)
self += io.gpio + self.eeprom.WP
# Request an I2C offer. In this case, there
# is only one (I2C1) so it will only be able to
# satisfy one.
bus = self.mcu.require(I2C)
self += bus + self.eeprom.BUS
#########################
# Top Level Circuit and Design Definitions
#########################
[docs]
class TopLevel(jitx.Circuit):
testcirc = I2CExample()
[docs]
class pin_assignment_tests(SampleDesign):
circuit = TopLevel()
